FMC loopback test board

FMC loopback test board

FMC loopback Overview

FMC loopback test board Block Diagram

The FMC loopback tester board enables developers and assembly factories to test and characterize the FMC carrier board interfaces. The board features full differential loopbacks on all the FMC high pin count (HPC) connector interfaces including LA, HA, HB, DP and CLK. It also provides a 125MHz transceiver LVDS reference clocks on GBTCLK signals. The FMC loopback board is based on VITA 57 standard with ruggedized conduction or air cooling.

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  • FMC carrier board testing during development
  • FMC carrier board electrical validation
  • FMC carrier board testing at assembly facilities


  • VITA 57 FMC compliant
  • HPC – High Pin count connector
  • Provides loopbacks on the LA, HA and HB differentials pairs
  • Provides TX to RX loopbacks on the Multi-gigabit differential pairs DP0 to DP9
  • Ruggedized Conduction or air cooled
  • 125MHz LVDS transceiver reference clocks
  • Led indicator for powers and power good
  • JTAG breakout to test points


  • 125MHz LVDS oscillators feed the GBTCLK pairs
  • Loopback of CLKx_C2M to CLKx_M2C pairs

FMC IO interface

  • Loopback of even to odd pairs on LA/HA/HB
  • DP_C2M[9:0] loopback to DP_M2C[9:0]


Parameter Value
Power consumption on +12V 0A
Power consumption on +3.3V <0.1A
Power consumption on VADJ 0A
Power consumption on +3.3VAUX <0.1A
Air cooled weight TBD
Conduction  cooled weight TBD
Operating temperature -40 to +85
Operating humidity 0% to 95% non condensing


  • FMC loopback test board


The FMC loopback test board is delivered in air and conduction cooled FMC standards.
The board supports standard VITA 47 ruggedization levels for severe environmental conditions.

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