FPGA Authentication IP Core
FPGA authentication IP Core Overview
KAYA Instruments’ FPGA authentication IP Core is a cost effective way to protect FPGA designs and FPGA IPs against piracy cloning and tampering. The IP Core uses an external BQ26100 authentication chip from TI and communicates with it using one wire interface. The IP Core uses an SHA-1 challenge and response authentication scheme that is judged to be one of the most secure schemes available. A random message is used each time to avoid tampering of the one wire interface; the randomization of the message can be synchronized to a random data source such as PLL or user traffic. All the leading industry FPGA and CPLD vendors are supported.